Registers
are memory size is very
small with very high-speed
access. Registers
used to store data and instructions are being processed, while that data and other instructions
waiting to be processed
are stored in
main
memory. Registers in the CPU
consists of:
A. Instruction
Register (IR)
is used to store
instructions that are processed.
2.
Program Counter (PC) is
a register that is
used to store the
address location of
main memory containing
the instruction being processed.
during the process progresses, the content
is converted to PC main memory address containing instructions The next to be processed.
This makes it possible to
trace The next instruction
in main memory.
3. General-purpose registers,
the registers that have a wide range of functions associated with the data being processed. For
example, if used for accommodate the data being processed is referred to as the operand register, while if it is used to hold the
processed result is called the accumulator.
4.
Memory Data Register (MDR),
which registers are used to
hold data or
instructions sent from
main memory to the CPU, or contain data that saved to main memory as a result of CPU processing.
5.
Memory Address Register (MAR) is used
to hold data or address instructions on the main
memory to be taken or
to be placed.
Registered (also called buffered) memory modules have a register between the DRAM modules and the system's memory controller. They place less electrical load on the memory controller and allow single systems to remain stable with more memory modules than they would have otherwise. Registered memory is often more expensive because of the lower volume and the additional components, so it is usually found only in applications where the need for scalability and stability outweighs the need for a low price (servers, for example). Although most server-grade memory modules are both ECC and registered, there are both registered non-ECC modules and non-registered ECC modules.
Nominally, there is a performance penalty for using registered memory. Each read or write is buffered for one cycle between the memory bus and the DRAM, so the registered RAM can be thought of as running one clock cycle behind the equivalent unregistered DRAM. With SDRAM, this only applies to the first cycle of a burst.
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